Exemplary embodiments relate to a semiconductor memory device and a method of operating the same and, more particularly, to a non-volatile memory device and a method of operating the same.
A method of storing data of 2 bits in one memory cell is being used to increase the data storage capacity of a NAND flash memory device. In order to store data of 2 bits in one memory cell, the threshold voltages of the plurality of memory cells are classified into four levels depending on the bit of the data. Data is stored in memory cells through a program operation, and the threshold voltages of the plurality of memory cells rise from the erase level to one of the three program levels depending on the stored data. According to an example, the threshold voltages of the plurality of memory cells rise uniformly. There may be manufactured, however, fast program cells each having a threshold voltage higher than those of normal memory cells under the same program operation condition. Even though the threshold voltages of the normal memory cells are less than a target threshold voltage, the threshold voltages of the fast program cells may be much higher than the target voltage through the same program operation. For this reason, the plurality of memory cells may have a distribution of the threshold voltages that is wide around the target voltage. Here, an error may be generated because the threshold voltages of the fast program cells are considered as being much higher than a selected level.